Introduction
The Inter-Integrated Circuit (I2C or I²C) protocol is a widely used serial communication protocol designed for short-distance communication between integrated circuits on the same circuit board. Developed by Philips (now NXP Semiconductors) in the 1980s, I2C is commonly used in embedded systems for connecting microcontrollers to peripherals like sensors, displays, and memory devices.
Key Features
- Two-Wire Interface: I2C uses two bidirectional open-drain lines:
- SDA (Serial Data Line): Transmits data.
- SCL (Serial Clock Line): Synchronizes data transfer.
- Multi-Master, Multi-Slave: Supports multiple masters and slaves on the same bus.
- Addressing: Uses 7-bit or 10-bit addressing to identify devices.
- Half-Duplex: Data is transmitted in one direction at a time.
- Speed Modes:
- Standard Mode: Up to 100 kbps.
- Fast Mode: Up to 400 kbps.
- Fast Mode Plus: Up to 1 Mbps.
- High-Speed Mode: Up to 3.4 Mbps.
- Low Power: Simple design suits low-power applications.
I2C Bus Operation
Bus Configuration
- Master and Slave Roles:
- The master initiates and controls communication, generating the clock signal on SCL.
- Slaves respond to the master’s commands based on their unique address.
- Pull-Up Resistors: SDA and SCL lines require pull-up resistors (typically 1kΩ to 10kΩ) to maintain a high state when idle.
- Open-Drain: Both lines are open-drain, allowing multiple devices to share the bus without conflict.
Data Transfer
- Start Condition: The master pulls SDA low while SCL is high, signalling the start of communication.
- Addressing:
- The master sends a 7-bit or 10-bit slave address followed by a read/write bit (0 for write, 1 for read).
- The addressed slave responds with an acknowledgment (ACK) by pulling SDA low.
- Data Transmission:
- Data is sent in 8-bit packets, followed by an ACK bit from the receiver.
- The master generates the clock signal on SCL to synchronize data transfer.
- Stop Condition: The master releases SDA to high while SCL is high, ending the communication.
Advantages
- Simple two-wire design reduces pin count.
- Supports multiple devices on a single bus.
- Flexible addressing allows easy addition of devices.
- Low-cost implementation.
Limitations
- Limited communication range due to open-drain architecture (typically a few meters).
- Slower compared to protocols like SPI.
- Susceptible to noise and bus capacitance issues.
- No built-in error checking beyond ACK/NACK.
Common Applications
- Sensors (e.g., temperature, humidity, pressure sensors).
- EEPROMs and other memory devices.
- Real-time clocks (RTCs).
- Display modules (e.g., OLED, LCD).
- Communication between microcontrollers and peripherals in embedded systems.